1.2.1.1 Overview

 Hardware may trigger an interrupt at any time by sending a signal to the CPU, usually by way of the system bus. (There may be many buses within a computer system, but thesystem bus is the main communications path between the major components.) Interrupts are used for many other purposes as well and are key part of how operating systems and hardware interact.

When the CPU is interrupted, it stops what it is doing and immediately transfers execution to a fized location. The fized location usually contains the starting address where the service routine for the interrupts is located. 

The interrupt service routine executes; on completion, the CPU resumes the interrupted omputation. A timeline of this operation is shown in Figure 1.3.

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Inerrupts are an important part of a computer architecture. Each computer design has its own interrupt machanism, but serveral funtions are common. The interrupts must transfer control to the appropriate interrupts service routine. The straightforward method for managing this transfer would be to invoke a generic routine to examine the interrupt information. The routine, in turn, would call the interrupt0specific handler. However, interrupts must be handled quickly, as they occur very frequently: A table of pointers to interrupt routine is called indirectly through the table, with no intermediate routine needed.

Generally, the table of pointers is stored in mow memory(the first hundred or so locations). These location hold the addresses of the interrupts service routines of the various devices. This array, or interrupt vector, of addresses is then indexed by a unique number, given with the interrupt request, to provide the address of the interrupt service routine for the interrupting device. Operating system as different as Windows and UNIX dispatch interrupts in this manner.

The interrupt architecture must also svae tghe state information of whatever was  interrupted, so that it can resotre this information after servicing the instance, by modifying register values-it must explicityl save the current state and then resotre that state before retuning. After the interrupt is serviced, the saved return address is loaded into the program counter, and the interrupted computation resumes as though the interrupt had not occurred.