Caching is an important principle of computer systems. Here's how it works. Information is normally kept in some storage system (such as main memory). As it is used., it is copied into a faster storage system-the cache-on a temporary basis. When we need a particular piece of information, we first check whether it is in the cache. If it is, we use the information directly from the cache.
If it is not, we use the information from the source, putting a copy in the cache under the assumption that we will need it again soon.
In addition, internal programmable registers provide a high-speed cache for main memory. The programmer (or compiler) implements the registerallocation and register-replacement algorithms to decide which iunformation to keep in registers and which to keep in main memory.
Other caches are implemented totally in hardware. For instance, most system have an instruction cache to hold the instructions expected to be executed next. Without this cache, the CPU would thave to wait serveral cycles while an instruction was tfetched from main memory. For similar resons, most system have one or more high-speed data caches in the memory hierarchy. We are not concerned with these hardware-only cache in this text, since they are outside the control of the operating system.
Because cache have limited size, cache management is an important design problem. Careful selection of the cache size and of a replacement policy can result in greatly increased performance, as you can see by examining Figure 1.14. Replacement algorithms for software-controlled caches are discussed in Caphter 10.
The movement of information between levels of implicit. depending on the hardware design and the controlling operating-system software. For instance, data transfer from cache to CPU and registers is usually a hardware function, with no operating-system intervention. In contrast, transfer of data from disk to memory is usually controlled by the operating system.
In a hierarchical storage structure, the same data may appear in different levels of the storage system. For example, suppose that an integer A that is to be incremented by 1 is located in file B, and file B resides on hard disk. The increment operating proceeds by first issuing an I/O operation is followed by dcopying A to the cache and to an interanl register. Thus, the copy of A appears internal register (see Figure 1.15). IOnce the increment takes place in the internal register, the value of A differs in the various storage systems. The value of A becomes the sma only after the new value of A is written from the interanl register back to the hard disk.
In a computing environment where only one process executes at a time, this arrangement poses no difficulties, since an access to integer A will always be to the copy at the highest level of the hierarchy. However, in a multitasking environment, where the CPU is switched back and forth among various processes, extreme care must be taken to ensure that, if several processes wish to access A, then each of these processes will obtain the most recently updated value of A.
The situation becomes more complicated in amultiprocesssor environment where, in addition to maintaining interal registers, each of the CPUs also contains a local cache (refer back to Figure 1.8). In such an environment, a copy of A may exist simultaneously in several caches. Since the various CPUs can all exeute in parallel, we must make sure that an update to the value of A in one cache is immediately reflected in all other caches where A resides. This situation is called cache coherency, and it is usually a hardware issue(handled below the operating-system level).
In a distributed environment, the situation becomes even more complex. In this environment, several copies(or replicas)of the same file can be kept on different computers. Since the various replicas may be accessed and updated concurrently, some distributed systems ensure that, when a replica is updated in one place, all other replicas are brought up to date as soon as possible. There are various ways to achieve this gurantee, as we discuss in Chapter 19.
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